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Research and Application of Chemical Mechanical Polishing for Large-Diameter Silicon Wafers and Its End-Point Detection Techniques

2008-01-02View Original

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Research and Application of Chemical Mechanical Polishing for Large-Diameter Silicon Wafers and Its End-Point Detection Technology -------------------------------------------------------------------------------- Luo Yuqing, Kang Renke, Guo Dongming, Kim Ju-gi Abstract: Chemical mechanical polishing is a key technology for achieving global planarization of silicon wafers. However, in practical applications, this technology is still constrained by various issues related to the integration of manufacturing systems, among which an effective end-point detection system plays a crucial role in determining the quality of the polishing process. Without effective monitoring of the polishing process, it is impossible to avoid defects such as over-polishing or under-polishing of the silicon wafers. Based on an introduction to the CMP mechanism and its applications, this paper systematically analyzes the current research status and existing problems of CMP endpoint detection technology. 1 Introduction In recent years, with the rapid development of the semiconductor industry, semiconductor wafers have been evolving toward smaller sizes, higher circuit density, faster performance, and lower power consumption. Integrated circuits have now entered the ULSI sub-micron technology stage. At the same time, the diameter of silicon wafers is gradually increasing. According to the Microelectronics Technology Development Roadmap issued by the Semiconductor Industry Association (SIA) of the United States, by 2005, silicon wafers with a diameter of 300 mm will become the standard product, and by 2008, silicon wafers with a diameter of 450 mm (18 inches) will start to be used. The width of the lines within the components has also been reduced from 0.18μm to 0.13μm, and the number of metal layers is moving toward higher values; as a result, the requirements regarding the flatness of the silicon wafer surface are becoming increasingly stringent. Taking DRAM chips, which are at the forefront of ULSI device manufacturing technology, as an example, the technological development trends of logic ICs are shown in Table 1. As the number of metal layers increases, in order to achieve a multi-layer wiring structure on large-diameter silicon wafers, etching requires that each layer possess a high degree of global flatness. This means it is necessary to flatten any unevenities in the insulators, conductors, interlayer dielectrics (ILD), embedded metals (such as Al and Cu), shallow trench isolations (STI), silicon oxides, polycrystalline silicon, and other components within the multi-layer wiring interconnection structure – and this is key to realizing three-dimensional structures in large-scale integrated circuits. Among the various planarization techniques, chemical mechanical polishing (CMP) is currently the only one capable of achieving global planarization; as such, in today’s most advanced semiconductor technologies, CMP has become a key technology that attracts much attention. CMP is a new technology developed by IBM in 1985 while working on CMOS products, and it was successfully applied to the production of 64MB DRAM in 1990. After 1995, CMP technology developed rapidly and was widely applied in the semiconductor industry. Research and development efforts in CMP were previously led mainly by the Semiconductor Manufacturing Technology Alliance (SEMATECH) in the United States, but have now expanded globally. The European consortium JESSI, the French research institute LETI and CNET, the German FRAUDHOFER Institute, and Japan’s Ebara Corporation also joined one after another. Taiwan and South Korea in our country have also conducted extensive research on CMP, but there is very little research in this area domestically. Currently, major construction projects such as the \"909 Project\" have been launched in China to encourage fundamental research on processing technologies for the semiconductor industry. As a key technology in semiconductor manufacturing processes, CMP is bound to become a focal point of research and development in the coming years. 2 The mechanism of silicon wafer CMP and its applications: As IC components increasingly adopt small-sized, highly integrated multi-layer 3D wiring, the limitations imposed by lithography in terms of resolution and focal depth (i.e., depth of field) become greater. As a result, higher requirements are placed on the surface flatness of silicon wafers. This need for flatness becomes even more critical when the products require three or more metal layers. This is because it is very difficult to focus simultaneously on both the recessed and protruding areas of a uneven surface. Moreover, during subsequent manufacturing, a certain degree of flatness is required between each layer of circuits; otherwise, the circuits cannot be connected properly. Therefore, in the trend of IC manufacturing toward finer structures, thinner films, and more three-dimensional wiring, chemical mechanical polishing of silicon wafers is undoubtedly an essential key technology. The entire system of a silicon wafer CMP machine consists of three main components: a rotating silicon wafer holder, a table that holds the polishing pad, and a fluid delivery system for the polishing solution. During chemical mechanical polishing, the rotating workpiece is pressed against the rotating polishing pad with a certain pressure. A polishing slurry composed of sub-micron or nano-sized abrasive particles and a chemical solution flows between the silicon wafer and the polishing pad; driven by the movement of the polishing pad and centrifugal force, the slurry is evenly distributed across its surface, forming a thin liquid film between the silicon wafer and the polishing pad. The chemical components in this liquid react with the silicon wafer, converting insoluble substances into soluble ones. These reaction products are then removed from the surface of the silicon wafer through the micromechanical friction of the abrasive particles and carried away by the flowing liquid. It is through this alternating process of chemical film formation and mechanical film removal that ultra-precise surface processing is achieved, thereby achieving planarization. CMP can be expressed using the following Preston equation (1), where H is the height of the protruding part of the pattern ; t is the polishing time, L is the pressure ; A is the contact area ; s is the relative displacement amount ; Kp is the Preston constant (a parameter of machine performance). As can be seen from the above equation, the removal rate on the surface of the silicon wafer is proportional to the relative velocity between the silicon wafer and the polishing pad, as well as the polishing pressure. During the polishing process, in addition to the influence of mechanical parameters and the properties of the polishing pad, factors such as the temperature of the polishing area, as well as the size, viscosity, and pH value of the abrasive particles in the polishing solution, all have a significant impact on the planarization effect. Generally, when the relative speed between the silicon wafer and the polishing pad surface, the pressure, and the supply of polishing fluid are stable, the silicon wafer will be polished evenly. Chemical mechanical polishing is repeatedly used in the multi-layer iterative wiring of the early stages of silicon wafer fabrication. Numerous studies have shown that CMP is not only the best method for obtaining a nanoscale, ultra-smooth and damage-free surface on single-crystal silicon wafers, but also an irreplaceable interlayer planarization technique for multi-layer wiring in ULSI chips. Its applications in integrated circuit manufacturing are mainly focused on the following areas. ⑴CMP of silicon oxide thin films. Silicon oxide is commonly used as an insulating film or isolation layer; therefore, the flatness of the silicon oxide layer affects the manufacturing of subsequent layers, as well as the wiring and positioning processes. Typically, silicon oxide layers are deposited using the CVD (Chemical Vapor Deposition) method; as a result, excessive buildup layers need to be removed through CMP. There is no clear endpoint for this process – the criterion is to remove enough material from the film so that the required flatness is achieved, as shown in Figure 1. ⑵CMP of interlayer insulating films. Regarding the planarization of interlayer insulating films, the materials to be polished include plasma-assisted chemical vapor deposition films, borophosphosilicate glass, and thermally oxidized films. The CMP polishing conditions for each type of material vary depending on the type of polishing slurry, polishing pressure, and polishing time. When polishing insulating films with different properties, the completion of the process is usually determined by monitoring the end of polishing, as shown in Figure 2. ⑶CMP for shallow trench isolation. After grooves are formed on the silicon wafer through etching, a silicon oxide film is deposited using CVD. The silicon oxide film that remains outside the grooves is then removed via CMP, with a polishing layer having a relatively slow polishing speed (such as a silicon nitride film) serving as the stop layer for CMP. At this point, the silicon oxide within the grooves becomes the insulating film in the circuit, as shown in Figure 3. ⑷CMP of polysilicon. This involves deepening the trenches in the STI process; silicon oxide or silicon nitride is deposited via CVD, after which polysilicon is used as the material for filling the trenches. CMP is then employed to remove the excess polysilicon outside the deep trenches, with the silicon oxide or silicon nitride layer formed on the silicon wafer and within the trenches serving as the polishing stop layer, that is, the endpoint. This method is commonly used in the fabrication of trench capacitors, as shown in Figure 4. ⑸CMP of metal films. Metals commonly used as conductors in semiconductor manufacturing include aluminum, tungsten, and copper. In addition to smoothing metal wires, CMP can also be used to create \"contact holes\" for connecting wires between two layers of circuitry; this is done by etching grooves for these contact holes in the insulating layer between the two layers, then depositing the metal used as a conductor material into those grooves via CVD, and finally removing any excess metal layer using CMP. This method is IBM’s tiling method, as shown in Figure 5. Since the pressure applied by the polishing pad has a greater effect on the protrusions on the silicon wafer, the degree of polishing of the wafer varies depending on the density and size of the wires. In other words, the large-area insulating layer generally functions well as a polishing stop layer, but in areas with a high density of metal wires, excessive polishing tends to occur due to the small area occupied by the insulating film layer; this is a major problem that needs to be addressed urgently in the field of CMP. 3 Endpoint Detection Technology and Its Characteristics: To improve the stability and productivity of CMP technology and to achieve automated control over CMP processes, it is absolutely essential to have a technology for monitoring the end point of polishing. CMP involves removing material from the surface of a silicon wafer in a uniform manner, step by step and in small amounts, starting from the raised areas, in order to flatten it. The thickness of the thin film remaining on the flattened silicon wafer needs to be controlled with high precision; without effective monitoring of the CMP process, it is impossible to avoid over-polishing or under-polishing of the silicon wafer. Therefore, endpoint detection for silicon wafer CMP is absolutely necessary. In the CMP process of the first half of silicon wafer fabrication, the so-called end point of the process is when the deposited film on the dielectric layer is completely removed, leaving only the deposits that fill the pores in the dielectric layer. 3.1 Time-based offline end-point detection technology: Time-based offline end-point detection technology is the mainstream technique currently used by major semiconductor component manufacturers in China, such as Shougang Nidec Electronics Co., Ltd. and Youyan Semiconductor Materials Co., Ltd. The methods used to determine the end point of polishing generally depend on the requirements of different products; the polishing end point is determined by presetting the amount of material to be removed and then controlling the polishing time. Typically, preliminary experimental polishing is carried out on sample pieces or products, and after offline evaluation outside the processing equipment, the relationship between polishing time and polishing speed is established, which is then used to achieve CMP flattening of the products. Offline end-point detection has advantages such as ease of implementation and high operability, but the polishing time for each CMP process varies depending on factors such as the material being polished and the environment. Due to differences in the shape of the wire metal patterns in the underlying layer beneath the object to be polished, the proportion of accumulation, the type of components, and the manufacturing process, various variations occur during CMP. For example, the surface of the interlayer insulating film varies depending on the unevenness, size, positional distribution, height, and density of the circuit pattern structure, which in turn results in variations in the polishing time. In addition, the polishing pad material, the temperature distribution of the polishing pad, the type of polishing solution, and the method of applying pressure to the silicon wafer also affect the efficiency and time required for CMP. Time-based offline end-point detection cannot effectively prevent under-polishing or over-polishing; it can also cause damage, scratches, and contamination to the surface of the polished silicon wafers during offline inspection. Moreover, it is time-consuming and results in low productivity, leading to a reduction in the output of silicon wafers and increased costs. Therefore, this end-point detection technique is mainly used in the processing of silicon wafers with a diameter of ≤200 mm, but it can no longer meet the requirements of automated processing for large-diameter silicon wafers today. 3.2 Real-time On-line End-point Detection Technology Real-time on-line end-point detection for silicon wafer CMP has always been a focus of attention in the semiconductor industry. During the CMP process, since the surface of the silicon wafer is in full contact with the polishing pad, it is very difficult to carry out real-time monitoring of the wafer’s polishing. Moreover, to develop this technology, it is necessary to take into account the repeatability of the polishing process and eliminate the influence of interfering factors such as polishing slurry and mechanical vibrations. Furthermore, to facilitate the acquisition and processing of signals, the optimal selection of polishing pads and polishing fluids is also necessary. In 1991, Sandhu.S and Laurence D from Micron Technology in the United States proposed a method for online detection of the polishing end point by utilizing changes in the current signal of the motors driving the polishing head or polishing machine. Compared to time-based offline end-point detection, online end-point detection enables better control over changes in the thickness of the silicon wafer film, reduces the need for repeated operations, and facilitates the automation of CMP processes. This improves the utilization rate and output of polishing equipment. It also helps to avoid various defects that arise during the polishing of STI layers, polycrystalline silicon, and metals, reduces defects in the density distribution of IC devices, lowers unevenness, and ultimately enhances the stability and reliability of semiconductor devices. 4 Research and Applications of Endpoint Detection Techniques To date, various research institutions and manufacturers abroad have carried out a series of studies on online real-time endpoint detection techniques (EPD) for the chemical mechanical polishing of silicon wafers. Monitoring methods based on optical, electrical, acoustic or vibrational, thermal, frictional, chemical, or electrochemical principles have been proposed, with the main approaches involving the monitoring of changes in the current of the drive motor, acoustic emission signals, temperature changes in the polishing pad, and changes in ion concentration in the polishing solution. 4.1 Endpoint detection based on changes in the drive motor current. Sandhu S and Laurence D from Microsemi Corporation in the United States proposed a method for online detection of the polishing endpoint by utilizing changes in the current signal of the drive motor of the polishing head or polishing machine; the structure is shown in Figure 6. The principle of this method is that when silicon wafer polishing reaches its end point, the different film materials in contact with the polishing pad cause a significant change in the friction coefficient between the silicon wafer and the polishing pad. For example, when the polycrystalline silicon film on the wafer is removed, the silicon nitride film beneath, which has a relatively slower polishing speed, becomes exposed; this results in a change in the friction force between the wafer and the polishing pad, thereby causing a change in the rotational torque of the polishing head or polishing machine. The current flowing through the drive motor also changes as a result. Therefore, by using sensors installed on the polishing head and polishing machine to monitor changes in the drive motor current, it is possible to determine whether the polishing process has reached its end point. This method is suitable for metal film polishing and polysilicon polishing processes where the friction coefficient varies significantly, but it is not suitable for silicon oxide polishing, whose polishing endpoint is the removal of the film thickness. 4.2 Endpoint detection based on acoustic emission signals Utilizing acoustic emission (AE) signals to monitor the end point of CMP polishing is a new method proposed by Jianshe Tang and others from the University of California, Berkeley; its structure is shown in Figure 7. CMP is actually a combination of chemical reactions and the free grinding action of abrasive particles in the polishing slurry, with the mechanical grinding effect being the source of the AE signals. Research shows that acoustic emission signals are closely related to the material removal process in CMP; significant changes occur when there are alterations in the material of the polished film layer, which serves as an indication that the polishing process has reached its end. The AE sensor exhibits high sensitivity within the material removal range of CMP (between 1 and 10 nm), and within this range the AE signals have a high signal-to-noise ratio, making them easy to acquire. AE sensors installed on CMP machines can be used to directly monitor the AE signals during silicon wafer polishing, and the AE signals can be converted into spectra using the Fast Fourier Transform (FFT) method for analysis. By monitoring the relationship between the surface condition of the silicon wafer and its spectrum, the significance of various spectra generated during wafer polishing was determined, which enabled the design of a real-time online CMP endpoint detection system. Using acoustic emission signals for endpoint detection is not suitable for polishing processes without changes in the material layer, as severe signal variations cannot be detected by the AE sensors to determine the end of polishing. 4.3 Endpoint detection based on changes in pad temperature In research on online endpoint detection for CMP, Hsi-chieh Chen and others from EBARA in Japan developed an experimental model that monitors the CMP process by detecting the temperature distribution of the polishing pad, based on the movement pattern between the silicon wafer and the polishing pad. The experimental model device is shown in Figure 8; it can be used to predict the temperature distribution of the polishing pad and to gain a clear understanding of the polishing condition on the silicon wafer surface. To obtain a clear temperature signal, it is necessary to optimize the type of polishing solution and the material of the polishing pad. Figure 9 shows the experimental analysis of 5 combinations of polishing pads and polishing fluids. As can be seen from the graph, when the polishing layer changes, the temperature of the polishing pad changes significantly; the extent of these changes varies depending on the type of polishing pad and polishing solution used. To facilitate analysis and judgment, it is desirable for the signal change effect to be as large as possible. This method can not only monitor changes in the material being polished on the silicon wafer, but also detect the wear condition of the polishing pad and the flatness of the polished surface of the silicon wafer. However, it is limited by the difficulty in obtaining temperature signals; the temperature signals on the polishing pad are easily affected by mechanical noise. Additionally, factors such as the polishing solution make it difficult to measure temperature values. Therefore, further research is needed to utilize temperature changes in the polishing pad for endpoint detection. 4.4 Endpoint detection based on optical spectral reflectance: Utilizing optical methods for real-time endpoint detection is currently the most promising technique for online monitoring, and various CMP equipment manufacturers have invested considerable resources in research in this area. This technology has a wide range of applications; the thickness measurement of most insulating films or thin films polished from Poly Si can be carried out using spectral reflectance. At the same time, since light with an energy lower than silicon’s band gap (such as infrared light IR) can penetrate silicon wafers, optical measurements can also be performed on these wafers, with a precision of up to 0.1 nm. Therefore, for the EPD of CMP, it will be a very good detection method. Raymond R. Jin and others from the American company Applied Materials have developed a new online end-point detection system. This system uses specialized devices installed on the machine to capture optical signals, which are related to changes in the thickness of the film being polished; once the desired film thickness is achieved, the machine automatically stops polishing. They also developed new optical signal pattern recognition algorithms specifically for this system, using signal processing to ensure a high success rate in detection. Furthermore, end-point detection based on changes in the ion concentration of the polishing slurry and end-point detection based on mechanical signal measurements are also current hot topics in online CMP monitoring; however, due to space constraints, they will not be discussed in detail here. The end point of the chemical mechanical polishing process for silicon wafers can be accurately determined using one or more of these methods simultaneously. The various signals captured during the CMP polishing process are mixed with a large amount of interference noise. Before processing the useful signals, it is necessary to filter out this noise and isolate the useful signals. Moreover, the real-time end-point detection system must analyze the parameters of the mechanical system, simulate the CMP polishing process, and establish a sensitive and stable signal monitoring mechanism. By utilizing signal data actually collected from CMP simulation machines and semiconductor-industry-grade CMP machines, as well as feedback from tests on the polished products, the practicality and reliability of the designed and developed system can be verified. 5 Conclusion At present, among the various techniques mentioned above, only the endpoint detection technique based on changes in the current of the drive motor has been actually applied in industrial production and turned into a product. The other techniques are still in the laboratory testing stage and have not been used in actual production. The reason for this is that most of these methods require modifications to the design and piping of the polishing machines; some can only be installed on specific types of machines. In addition, there are issues such as low measurement accuracy of the monitoring systems, overly complex signal processing, and poor reliability. Chemical mechanical polishing of large-diameter silicon wafers and its real-time end-point detection are areas with great potential for development. At present, no research has been conducted domestically, and most manufacturers of silicon wafers use imported products from abroad. Therefore, we should focus our research on the chemical mechanical polishing of silicon wafers and their in-line end-point detection, develop products with independent intellectual property rights and patents, and strive to catch up with international advanced levels.

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