What is the function of a watchdog (WD)?

The function of a watchdog is generally to restart the program when it runs abnormally, thereby protecting the system.

　Working principle: Once the system is running, the watchdog counter is activated, and the watchdog begins to count automatically. If the watchdog is not cleared after a certain period of time, its counter will overflow, triggering a watchdog interrupt; if a RESET signal is sent, it will cause the system to reset. It generally prevents the program from entering an infinite loop.

A watchdog, also known as a watchdog timer, is a timing circuit that typically has an input called the \"watchdog feed\" and an output connected to the MCU’s RST pin. When the MCU is working properly, it sends a signal to the watchdog feed at regular intervals, thereby resetting the WDT. If the watchdog feed is not provided for a specified period of time (usually when the program gets out of control), the WDT’s timer expires, and it sends a reset signal to the MCU, causing the MCU to reset itself. This prevents the MCU from freezing. The purpose of a watchdog is to prevent programs from entering an infinite loop or running out of control. Working principle: Once the system is running, the watchdog counter is activated, and the watchdog begins to count automatically. If the watchdog is not cleared after a certain period of time, its counter will overflow, which triggers a watchdog interrupt and results in the system being reset. Therefore, when using chips with a watchdog, be careful to reset the watchdog. A hardware watchdog makes use of a timer to monitor the execution of the main program; in other words, during the operation of the main program, it is necessary to reset the timer before the predetermined time expires. This is done to prevent infinite loops or situations where the PC pointer fails to return to its normal value. So, when the preset time arrives, it will reset the microcontroller. Commonly used WDT chips such as MAX813, 5045, and IMP813 cost between 4 and 10 yuan. The principle of software watchdog technology is similar; it’s just implemented using software methods. Let’s still take the 51 series as an example. We know that the 51 microcontroller has two timers, which we can use to monitor the execution of the main program. We can set a certain timing value for T0; when a timing interrupt occurs, a variable is assigned a value. This variable already has an initial value at the start of the execution of the main program. The timing value we set must be less than the runtime of the main program. At the end of the main program, the value of this variable is checked – if it has changed as expected, it indicates that the T0 interrupt worked properly; if no change occurs, the program is reset. For T1, which is used to monitor the operation of the main program, we set a certain timing for it; the main program is responsible for resetting it. If it cannot be reset within that time frame, the timing interrupt of T1 will cause the microcontroller to reset. Here, the timing for T1 should be set to be greater than the running time of the main program, to leave some margin for it. As for whether the interrupt of T1 is normal or not, we will monitor it using the T0 timing interrupt subroutine. This creates a loop: T0 monitors T1, T1 monitors the main program, and the main program in turn monitors T0, thereby ensuring the stable operation of the system. The 51 series features a dedicated watchdog timer that counts by dividing the system frequency; when the timer overflows, it triggers a reset. The watchdog’s overflow rate can be set, and it can also be used as a regular timer. The watchdog on the Lingyuan 61 is relatively simple: there is only one timing option, and in practice, all that’s needed is to include an instruction to reset the watchdog within the loop. The C8051Fxxx microcontroller also has a 21-bit timer that uses the system clock; this timer measures the time interval between two specific writes to its control register. If this time interval exceeds the programmed limit, a WDT reset will occur. -------------------------------------------------------------------------------- Precautions for using the watchdog: Most 51-series microcontrollers are equipped with a watchdog; if this watchdog is not cleared on schedule, it will cause a reset. This prevents the program from running out of control. The designer must be aware of the watchdog’s overflow time in order to clear it at the appropriate moment. Clearing the watchdog too frequently is also not advisable, as it can lead to waste of resources. When the program is running normally, the software sets the value of the timer at regular intervals (shorter than the timer’s overflow period), which prevents incorrect resets caused by overflow interrupts. Applications of the watchdog: The watchdog is useful for restoring the normal operation of a system and for effective monitoring and management – it can lock down optical drives or any specified programs, and can be used at home to prevent children from playing games, surfing the Internet, or watching videos excessively. Design concepts for the system software “watchdog”: 1. Configuration of the watchdog timer T0. Set the operating mode of T0 in the initialization block, and enable the interrupt and counting functions. The system has a Fosc of 12 MHz; T0 is a 16-bit counter with a maximum count value of (2 to the 10th power) – 1 = 65,535. The counting frequency for T0 is Fosc/12, and the overflow period is (65,535 + 1)/1 = 65,536 microseconds. 2. Calculate the time taken for the main control program to execute one cycle. Taking into account the various functional modules of the system and their number of iterations, the running time of the main control program in this system is approximately 16.6 ms. The system sets the \"watchdog\" timer T0 to count for 30 ms (the initial value of T0 is 65,536 – 30,000 = 35,536). Each iteration of the main control program will refresh the initial value of T0. If the program enters a \"dead loop\" and the initial value of T0 is not refreshed within 30 ms, then the \"watchdog\" timer T0 will overflow and request an interrupt. 3. Design the interrupt service routine corresponding to the T0 overflow. This subroutine requires only one instruction: writing a \"unconditional jump\" command to the interrupt vector address corresponding to T0 (000BH), which brings the computer back to the first line of the entire program, allowing the microcontroller to be reinitialized and achieving the correct execution order.

Is it that complicated? The watchdog is just a copyright issue; it’s essentially like a hardware serial number!

Those on the fifth floor who don’t understand shouldn’t mislead others here; the explanations on the fourth floor are much more detailed.