In Kangjisen’s SIS circuit, the reset button is always connected to an OR gate, with a flip-flop following it – how is reset achieved?
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In Kangjisen’s SIS circuit, the reset button is always connected to an OR gate, with a flip-flop following it – how is reset achieved? Seeking help from professionals, thank you!
Additional question: Is the input condition for the reset button 1 or 0?
It’s best to upload the image for easier analysis
A trigger has two input connections: S and R. The reset button is connected to an OR gate; this is probably because there are other conditions that can trigger automatic reset in addition to the reset button itself, and thus the R terminal of the contact relay behind the OR gate can be used for resetting. I’m not sure if my guess is correct. :handshake :handshake :handshake
I hope we can upload the image, as that will make it easier for everyone to analyze it
1\ It is estimated that there are two reset buttons: one is located on the INTOUCH screen, and the other is on the auxiliary control panel; therefore, an OR gate is used to connect them, so that the true value for the Kangjisen system is 1. 2\ There must be a NOT gate before and after the SR flip-flop in order to achieve the reset function. 3\ When the system is working properly, the reset button is in the 0 position; after passing through the NOT gate, the value becomes 0. At this point, both S and R are 0. According to the truth table, the output should remain unchanged from the previous value. Thus, when the reset button is pressed, S becomes 0, R becomes 1, and the output is 0; after passing through the NOT gate, the value becomes 1, and the system starts up. 4\ When the system is not working properly, either the DI or AI signals become active, resulting in a value of 0. After passing through the NOT gate, this becomes 1. Since the reset button is still in the 0 position, according to the truth table the output is 1; after passing through the NOT gate, it becomes 0, and the system stops operating. 5\ When the system is started again, the DI and AI signals return to their normal 1 state. After passing through the NOT gate, this becomes 0. With the reset button still in the 0 position, according to the truth table the output is 0; after passing through the NOT gate, it becomes 1, and the system starts up again normally. 6\ This is basically how it works, but in reality, it is possible to achieve the reset function without using SR flip-flops as well. 7\ There are two types of SR flip-flops; by looking at the truth tables, one can understand this.