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Is the wafer toxic?

2009-03-31View Original

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Dear colleagues in the polymer field, is the wafer toxic? Is the wafer manufacturing process toxic?
Reply #22009-03-31
Wafer manufacturing process   1. Surface cleaning   The wafer surface is covered with a layer about 2 um thick made of a mixture of Al2O3 and glycerin; chemical etching and surface cleaning are necessary before manufacturing.   2. Initial oxidation: A SiO2 buffer layer is generated through thermal oxidation, which serves to reduce the stress exerted on the wafer by Si3N4 during subsequent processes. Oxidation techniques include dry oxidation: Si(s) + O2 → SiO2(s), and wet oxidation: Si(s) + 2H2O → SiO2(s) + 2H2. Dry oxidation is commonly used to form gate silicon dioxide films that require thinness, as well as low interfacial energy levels and fixed charge densities. The film-forming speed of dry oxidation is slower than that of wet oxidation. Wet oxidation is commonly used to form a relatively thick silicon dioxide film for device isolation. When the SiO2 film is thin, the film thickness is proportional to time. As the SiO2 film thickens, its thickness is proportional to the square root of time. Therefore, to form a thicker SiO2 film, a longer oxidation time is required. The rate of SiO2 film formation depends on the amount of oxidizing agents such as O2 and OH groups that diffuse through the SiO2 film to reach the silicon surface. During wet oxidation, the diffusion coefficient in the SiO2 film due to OH groups is greater than that of O2. During the oxidation reaction, the Si surface moves toward the deeper layers by a distance equal to 0.44 times the thickness of the SiO2 film. Therefore, for SiO2 films of different thicknesses, the depth of the Si surface after removal also varies. The SiO2 film is transparent, and the film thickness is estimated through optical interference. The period of this interference color is about 200 nm, and it can be accurately estimated if it is known in advance how many times of interference there are. For other transparent films, if their refractive index is known, the formula can also be used to calculate (dSiO2)/(dox) = (nox)/(nSiO2). When the SiO2 film is very thin, no interference colors can be seen, but the presence of the SiO2 film can be determined by utilizing the hydrophobicity of Si and the hydrophilicity of SiO2. It can also be measured using an interferometric film meter or an ellipsometer, etc. The interface level density and fixed charge density at the SiO2/Si interface can be determined from the capacitance characteristics of MOS diodes. The interfacial level density of Si at (100) faces is the lowest, ranging around the order of 10E+10–10E+11/cm²·eV-1. At (100) facets, there are more fixed charges in the oxide film, and the magnitude of the fixed charge density becomes the main factor determining the threshold value.   3. Hot CVD/(thermal CVD) This method boasts high productivity, excellent ladder-like layer formation (the reaction occurs even on surfaces that are very uneven or in deep holes), and the gas can reach the surface to form a film; as a result, it has a wide range of applications. The principles of film formation, such as methods for creating thin films of nitrides, oxides, carbides, silicides, borides, high-melting-point metals, metals, and semiconductors on a substrate through gas-phase chemical reactions (thermal decomposition, hydrogen reduction, oxidation, substitution reactions, etc.) at high temperatures, using volatile metal halides (MX) and metal-organic compounds (MR). Its applications are limited due to the fact that it reacts only at high temperatures, but in the fields where it can be used, dense, highly pure material films with extremely strong adhesion can be obtained. With careful control, stable films can be produced, allowing for the easy creation of filaments (short fibers) and thus its range of applications is very wide. Thermal CVD methods can also be divided into atmospheric pressure and low-pressure types. Low-pressure CVD is suitable for processing multiple substrates simultaneously, with the pressure generally maintained between 0.25–2.0 Torr. Polysilicon used as a gate electrode is typically prepared by the HCVD method using SiH4 or Si2H6. It is deposited through the thermal decomposition of gas (at about 650°C). The silicon nitride film used for device isolation through selective oxidation is also produced by low-pressure CVD, via a reaction between ammonia and SiH4 or Si2H6. The SiO2 film used as an interlayer insulator is formed by the reaction of SiH4 and O2 at temperatures of 400–450°C to produce SiH4+O2-SiO2+2H2, or it is generated by reacting Si(OC2H5)4 (TEOS: tetra ethoxy silane) with O2 at a high temperature of around 750°C; the SiO2 film produced using TEOS has the advantage of good coverage on the side surfaces of steps. In the former case, by introducing PH3 gas during deposition, phosphor silicate glass (PSG) is formed; then by introducing B2H6 gas, a BPSG (borophosphor silicate glass) film is created. These two types of film materials have good fluidity at high temperatures, and are widely used as interlayer insulating films with excellent surface flatness.   4. Heat treatment Before applying the photoresist, an adhesion enhancer is applied to the surface of the cleaned substrate, or the substrate is subjected to heat treatment in an inert gas. This treatment is done to enhance the adhesion between the resist and the substrate, prevent the removal of the resist pattern during development, and avoid side etching that occurs during wet etching. The application of the photoresist is carried out using a spin-coater whose rotation speed and time can be set freely. First, the substrate is attached to the chuck of the spin-coater using vacuum suction. A photoresist with a certain viscosity is then dropped onto the surface of the substrate, after which the substrate is spun at a set speed and for a set duration. Due to the effect of centrifugal force, the photoresist spreads evenly over the surface of the substrate; any excess photoresist is removed, resulting in a photoresist film of a certain thickness. The thickness of this film is controlled by the viscosity of the photoresist and the rotation speed used for removing it. Resist is a material that is sensitive to light, electron beams, or X-rays, has the property of dissolving in developing solutions, and also possesses corrosion resistance. Generally speaking, positive resins have high resolution, while negative resins feature good sensitivity and adhesion to underlying layers. The precision of lithography depends on the fine patterns achieved (resolution, clarity), as well as the degree of positional accuracy with which these patterns align with those of other layers (registration accuracy). Therefore, in addition to a good photoresist, a good exposure system is also necessary.   5. Silicon nitride is removed here using a dry oxidation method. 6. Ion implantation is used to inject boron ions (B+3) into the substrate through the SiO2 layer, thereby creating P-type wells. Ion implantation is a method that utilizes an electric field to accelerate impurity ions and inject them into the silicon substrate. The advantage of ion implantation is its ability to precisely control the distribution of low-concentration impurities, which is difficult to achieve using diffusion methods. In MOS circuit manufacturing, ion implantation is used for channel termination to prevent parasitic channels during the device isolation process, for channel doping to adjust the threshold voltage, and for forming the wells and source-drain regions in CMOS. The ion implantation method typically involves ionizing the impurities to be incorporated into the semiconductor in an ion source, then accelerating the selected ions after passing through a mass analysis magnet, and implanting them into the substrate.   7. Remove the photoresist and place the wafer in a high-temperature furnace for annealing, in order to eliminate lattice defects and internal stresses in the wafer and restore the integrity of its lattice. It causes the implanted doped atoms to diffuse to substitutional sites, resulting in electrical properties.   8. The silicon nitride layer is removed using hot phosphoric acid, and phosphorus (P+5) ions are doped to form an N-type well; simultaneously, the thickness of the original SiO2 layer is increased to prevent the injection of n-type impurities into the P-type well in the next step.   9. Perform annealing treatment, and then use HF to remove the SiO2 layer.   10. The dry oxidation method is used to form a SiO2 layer, followed by LPCVD deposition of a silicon nitride layer. At this point, the surface of P-region has dropped below the surface level of the N-region due to the growth and etching of the SiO2 layer. The SiO2 layer and silicon nitride here serve the same purpose as before. The next steps are to create the isolation region and the isolation layer between the gate and the crystal plane.   11. Utilize lithography and ion etching techniques to retain the silicon nitride layer above the gate isolation layer.   12. Wet oxidation: a SiO2 layer without silicon nitride protection is grown to form an isolation region between the PN junctions.   13. Hot phosphoric acid is used to remove silicon nitride, after which an HF solution is employed to remove the SiO2 at the gate isolation layer location, thereby re-forming a higher-quality SiO2 film that serves as the gate oxide layer.   14. A polycrystalline silicon layer is deposited via LPCVD, followed by the application of a photoresist for photolithography and plasma etching to form the gate structure, and oxidation to generate a SiO2 protective layer.   15. Apply a resist layer on the surface, remove the resist in the P-region, and inject As ions to form the source and drain of the NMOS. Using the same method, in the N-region, B ions are implanted to form the source and drain of the PMOS.   16. Deposit an undoped oxide layer using PECVD to protect the components, and perform annealing treatment.   17. Deposit an oxidized layer doped with boron and phosphorus. SiO2 layers containing boron-phosphorus impurities have a lower melting point; the boron-phosphorus oxide layer (BPSG) softens and becomes flowable when heated to 800 °C, allowing for the initial flattening of the wafer surface.   18. For sputtering the first layer of metal, photolithography is used to create holes for metal contacts, and multiple layers of metal film such as titanium, titanium nitride, aluminum, and titanium nitride are sputtered. The wiring structure is etched using ions, and a layer of SiO2 dielectric is deposited on it via PECVD. The surface was then flattened using SOG (spin on glass), and the solvent in the SOG was removed by heating. Then another layer of dielectric is deposited to prepare for the deposition of the second layer of metal.   (1) The deposition method for thin films varies depending on their application, and the thickness is usually less than 1 um. There are various types of films, such as insulating films, semiconductor films, and metal films. The main methods for depositing thin films are CVD (chemical vapor deposition), which relies on chemical reactions, and PVD (physical vapor deposition), which utilizes physical phenomena. CVD methods include epitaxial growth, HCVD, PECVD, etc. PVD includes sputtering and vacuum evaporation methods. Generally speaking, PVD has a low temperature and no issue with toxic gases ; The CVD temperature is high; it needs to reach over 1000 oC in order to dissociate the gases and enable chemical reactions to occur. The adhesion of PVD-deposited layers to the material surface is somewhat weaker than that of CVD-deposited layers. PVD is suitable for use in the optoelectronics industry; metal conductive films in semiconductor manufacturing processes are mostly deposited using PVD, while other insulating films are generally created using the more demanding CVD technique. Hard films coated with PVD possess properties such as high strength and corrosion resistance.   (2) Evaporation deposition is a common film-forming method that uses heating methods such as resistive heating, induction heating, or electron beam to evaporate and deposit the raw material onto a substrate. The average free path length of the molecules (or atoms) of the evaporated material is very large (tens of meters at pressures below 10^-4 Pa); therefore, in a vacuum they hardly collide with other molecules and can reach the substrate directly. The raw material molecules that reach the substrate lack the energy for surface movement and immediately condense on the surface of the substrate; therefore, when depositing a film by vacuum evaporation on a surface with steps, the degree of surface coverage is generally unsatisfactory. But if the Crambo vacuum can be reduced to an ultra-high vacuum (

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