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Understanding interlock logic

2018-12-14View Original

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This post was last edited by Qingse Nianhua on 2018-12-16 at 20:23. As shown in the figure below, why is a \"AND\" logical operation used? In my understanding, both manual pump shutdown and pump shutdown triggered by the lack of liquid level detection should be implemented independently. Please give me some advice; could it be explained in simple terms? I’m not from an instrumentation major; please don’t look down on me···
Reply #22018-12-14
The second image is irrelevant; it was a mistake: L
Reply #32018-12-15
This post was last edited by 49205455 on 2018-12-15 at 14:00. You are correct in your understanding. But the logic is fine too. Either manual stop or underreporting will result in the pump stopping. It can be said to be independent.
Reply #42018-12-15
Could you be more specific? I don’t quite understand the statement that \"either manual shutdown or underreporting will result in the pump stopping.\" Thank you
Reply #52018-12-15
This is 0 logic. The switch has normally closed contacts, 1. When the stop button is pressed, the switch is disconnected and becomes 0, then it interlocks with the AND gate. An AND gate outputs 0 if either of its inputs is 0
Reply #62018-12-16
The logical relationship here is that the output is 1 only when all input conditions are 1; if any one of them is 0, the output is 0. In your logic, however, both the situation where the hand stops moving and the situation of underreporting result in an interrupted signal, meaning the input value is 0. Therefore, whenever any one of the inputs is 0, the output is 0. Hence, they can be considered independent of each other.
Reply #72019-03-30
You don’t have to take a plane to go to Beijing! One needs to approach specific problems from a different perspective; this involves a change in logical relationships. It’s advisable to review the basics of digital circuits once again. Never think that digital circuits are taught by physical education teachers
Reply #82019-03-30
When this is 0, interlock is triggered; all values must be 1 for there to be no interlock. If it is 1, interlock is triggered, and in that case the two independent conditions operate in an OR manner
Reply #92019-04-08
When looking at a diagram, one should not focus only on the NAND gates, but also on the normally open and normally closed contacts. If either of the two normally closed contacts is disconnected, or if either of the interlock mechanisms activates, it will result in an output of 0 from the AND gate; as a consequence, the DO relay loses power. In fact, they operate in an OR relationship.

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