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2021-08-02View Original

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This post was last edited by Heisenberg on 2021-8-20 at 12:35: 11111111111111111111111111111111111111
Reply #22021-08-10
Dude, this is the interlock logic diagram for DCS
Reply #32021-08-11
Explain how a logic diagram can be used to implement a switching function
Reply #42021-08-12
In Figure 1, when the valve-opening pulse arrives, it triggers the RS flip-flop. The output ‘1’ passes through the OR gate to the solenoid valve SOV, causing the valve to open. If the signal indicating that the valve has reached its fully open position is not received within the specified time period t, an alarm is generated; The same principle applies to closing valves ;

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