Please tell me what this logic diagram means
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Could you please describe what this logic diagram means? It connects T04042 (DI) and T04043 (DI). How do these two lines give signals? Didn't understand
This picture is actually very similar to the FBD language in PLC or DCS programming. For some special blocks, see the explanation of the pins of each block in the legend. Other general blocks (AND, OR, NOT, NAND, OR NOT, XOR, delay, counting, etc.) are the same as the programming. Just look from left to right and top to bottom, and you can understand each circuit.
Can you tell me in detail about the interlocking situation in this picture?
T04042 (DI) and T04043 (DI) inputs come from the AND gate on the left above the dotted line.
The OR gate is connected. Where does the signal come from at the input end of the OR gate? So confused
This is a time delay. Please refer to the description on the home page of the logic diagram for details. If it is not marked, it is recommended to consult the provider. Or refer to HG20505