SIS control logic
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May I ask why OR and AND inside represent exactly opposite meanings?
Or it is n equal to 1, that is, one condition being satisfied is sufficient； and means n takes n; all conditions must be satisfied
Normally, all conditions are 1, the result is 1, and the AND output is 1. When one of the input conditions has an interlock set to 0, the result is 0.
Why is it the opposite of the definitions of OR and AND?
Since it needs to be fail-safe, that is, a “0” interlock, it uses inverse logic
Correct! Now, many circuits operate in a loss-of-power mode, because this approach is safer; it’s the opposite of what we learn about circuit diagrams in high school physics.
If you really want to understand this, you’ll need to start by discussing SIL classification; or you can figure it out on your own.