Discussion on interlocking
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Hello everyone, I have a question. Thank you! Recently, when I looked at the interlock logic diagram, the process aspects were easy to understand, but I couldn’t figure out the logic of the diagram. For example, the drawing of a reset switch ； For example, some interlocks must meet certain flow or pressure conditions in order to be reset ； For example, some interlocks have delay time setters ； Are there any fixed ways to draw interlock logic diagrams? ? For example, using OR gates in combination, or using the output as an input condition again? ? Thank you for the advice
Find a more specific logic; saying this way doesn’t provide an intuitive understanding, nor can it lead to any suggestions
You’re thinking right; a self-locking logic diagram is needed, with the output feeding back to the input and reset to form an OR gate