What do or and and mean in SIS interlocking?
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How to understand the two of them within a chain?
Logically, the output is 1 only when all the conditions at the input are 1. So if one of the inputs is 0, the output will definitely be 0; when at least one of the inputs is 1, the output is 1. The input values must all be 0 for the output to be 0; you can check this by looking at the truth table
Professional answer: Try to summarize it – either meet any one of the conditions, or meet several conditions at the same time
OR gate: the output is 1 if at least one of the inputs is 1; AND gate: the output is 0 if all inputs are 0
Or, A or B means that either of A or B being true will trigger the subsequent consequence. P(A or B) = P(A) + P(B) – P(A) * P(B), where A and B refer to the conditions that must both be true for the subsequent outcome to occur. P(A and B)=P(A)*P(B)
It mainly depends on whether the input condition is 1 interlock or 0 interlock, and then the logic is checked by referring to the truth table.